Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automationAndrew S. CassidyGuillaume Garreauet al.2025arXivPaper
IBM NorthPole: An Architecture for Neural Network Inference with a 12nm ChipAndrew S. CassidyJohn V. Arthuret al.2024ISSCC 2024Invited talk
20 Jul 2010US7760565Wordline-to- Bitline Output Timing Ring Oscillator Circuti For Evaluating Storage Array Peformance