Daniel J. Friedman, Mounir Meghelli, et al.
IBM J. Res. Dev
A -3.3-V half-rate clock 4 multiplexer implemented in a 210-GHz f T 0.13-μm SiGe-bipolar technology and operating up to 132 Gb/s is reported. Among many design challenges, the control of on-chop clock distribution was critical to achieve such a high data rate. At 100 Gb/s, the chip operates reliably down to -3.0-V supply voltage and up to 100°C chip temperature. The circuit consumes 1.45 W from a -3.3-V supply voltage and exhibits less than 340-fs rms jitter on the output data.
Daniel J. Friedman, Mounir Meghelli, et al.
IBM J. Res. Dev
Seongwon Kim, Mohit Kapur, et al.
CICC 2003
Glenn E. R. Cowan, Mounir Meghelli, et al.
ISCAS 2013
Anand Ramaswamy, Jonathan E. Roth, et al.
OFC 2015