A Cryo-CMOS Control System for Large-Scale Superconducting Qubit Quantum Computing: Part 2

Scaling toward large-scale and fault-tolerant quantum computing requires overcoming engineering challenges across the entire quantum system, particularly in qubit control infrastructure. For example, superconducting quantum processing unit (QPU) architectures based on quantum low-density parity-check (QLDPC) codes demand significantly more flux-tunable couplers than physical qubits. In this context, we present the first demonstration of a scalable cryogenic quantum control system element comprised of an array of multi-channel cryo-CMOS flux bias control chips, connected to the majority of flux-tunable couplers on IBM's 156-qubit Heron R2 QPU. Two-qubit gates performed using cryo-CMOS achieve a median randomized benchmarking error per gate of ~$2.3x10{^-3}$, comparable to that achieved using room temperature electronics with the same QPU. Additional experiments demonstrate that cryo-CMOS operates with low noise and high stability across various configurations and temperatures. Finally, we validate full-stack integration through the Qiskit interface, culminating in an at-scale benchmarking experiment on par with IBM's highest-performing deployed quantum systems.