Jin Cai, Yuan Taur, et al.
VLSI Technology 2002
A new “shift and ratio” (S&R) method for extracting MOSFET channel length is presented. In this method, channel mobility can be any function of gate voltage, and high source-drain resistance does not affect extraction results. It is shown to yield more accurate and consistent channel lengths for deep-submicrometer CMOS devices at room and low temperatures. It is also found that, for both nFET and pFET, the source-drain resistance is essentially independent of temperature from 300 to 77 K. © 1992 IEEE
Jin Cai, Yuan Taur, et al.
VLSI Technology 2002
Clement Wann, Fariborz Assaderaghi, et al.
IEEE Electron Device Letters
David J. Frank, Robert H. Dennard, et al.
Proceedings of the IEEE
Yuan Taur, Jack Yuan-Chen Sun, et al.
IEEE T-ED