Lerong Cheng, Jinjun Xiong, et al.
ASP-DAC 2008
This paper focuses on approaches to continuing CMOS scaling by introducing new device structures and new materials. Starting from an analysis of the sources of improvements in device performance, we present technology options for achieving these performance enhancements. These options include high-dielectric-constant (high-k) gate dielectric, metal gate electrode, double-gate FET, and strained-silicon FET. Nanotechnology is examined in the context of continuing the progress in electronic systems enabled by silicon microelectronics technology. The carbon nanotube field-effect transistor is examined as an example of the evaluation process required to identify suitable nanotechnologies for such purposes.
Lerong Cheng, Jinjun Xiong, et al.
ASP-DAC 2008
Xiaozhu Kang, Hui Zhang, et al.
ICWS 2008
Maurice Hanan, Peter K. Wolff, et al.
DAC 1976
Liat Ein-Dor, Y. Goldschmidt, et al.
IBM J. Res. Dev