Conference paper
Investigations of silicon nano-crystal floating gate memories
Arvind Kumar, Jeffrey J. Welser, et al.
MRS Spring 2000
We report high-speed planar silicon p-i-n photodiodes fabricated on Silicon-on-Insulator (SOI) substrates. The devices were fabricated in standard CMOS technology with no additional fabrication steps required. The 250-nm finger-spacing devices exhibited 15- and 8-GHz bandwidths for devices processed on 200- and 2000-nm SOI substrates, respectively, at a reverse bias of -9 V. Quantum efficiencies of 12% and 2% were measured on the 2- and 0.2-μm thick SOI, respectively. The dark current was 5 pA for -3 V bias and 500 μA for -9 V bias.
Arvind Kumar, Jeffrey J. Welser, et al.
MRS Spring 2000
Sung Ho Kim, Oun-Ho Park, et al.
Small
F.J. Himpsel, T.A. Jung, et al.
Surface Review and Letters
Andreas C. Cangellaris, Karen M. Coperich, et al.
EMC 2001