K.L. Lee, J.O. Chu, et al.
IEDM 2002
In this letter, we report germanium (Ge) p-channel MOSFETs with a thin gate stack of Ge oxynitride and low-temperature oxide (LTO) on bulk Ge substrate without a silicon (Si) cap layer. The fabricated devices show 2 × higher transconductance and ∼ 40% hole mobility enhancement over the Si control with a thermal SiO2 gate dielectric, as well as the excellent subthreshold characteristics. For the first time, we demonstrate Ge MOSFETs with less than 100-mV/dec subthreshold slope.
K.L. Lee, J.O. Chu, et al.
IEDM 2002
Yanqing Wu, Yu-Ming Lin, et al.
IEDM 2010
M. Guillorn, J. Chang, et al.
IEDM 2009
D. Singh, J. Hergenrother, et al.
IEEE International SOI Conference 2005