S.J. Koester, K.L. Saenger, et al.
Electronics Letters
In this letter, we report germanium (Ge) p-channel MOSFETs with a thin gate stack of Ge oxynitride and low-temperature oxide (LTO) on bulk Ge substrate without a silicon (Si) cap layer. The fabricated devices show 2 × higher transconductance and ∼ 40% hole mobility enhancement over the Si control with a thermal SiO2 gate dielectric, as well as the excellent subthreshold characteristics. For the first time, we demonstrate Ge MOSFETs with less than 100-mV/dec subthreshold slope.
S.J. Koester, K.L. Saenger, et al.
Electronics Letters
H. Shang, J.O. Chu, et al.
VLSI Technology 2004
S.J. Koester, K.L. Saenger, et al.
ECS Meeting 2004
Josephine Chang, Michael A. Guillorn, et al.
VLSI Technology 2011