Dipanjan Gope, Albert E. Ruehli, et al.
IEEE T-MTT
2-D MonteCarlo (MC) simulations were used to explore the property of silicon germinium (SiGe) layers to control and enhance channel-initiated secondary electron (CHISEL) gate current. Novel SiGe flash memory cells showed a 4X enhancement in CHESEL gate current for both planar and vertical 0.18μtechnology.
Dipanjan Gope, Albert E. Ruehli, et al.
IEEE T-MTT
K.A. Chao
Physical Review B
Mark W. Dowley
Solid State Communications
M. Hargrove, S.W. Crowder, et al.
IEDM 1998