Ziyang Liu, Sivaramakrishnan Natarajan, et al.
VLDB
Several illustrations of a general technique called the Algorithm and Architecture approach was presented. The programmer controlled unrolling of loops was demonstrated equivalent to customized vectorization of RISC-type code. Its use was illustrated to show that RS/6000 processors could compute the distribution (-1, 1) at the rate of 3.25 multiply-adds. A linear congruential generators, related to the multiplicative congruential generators was also specified.
Ziyang Liu, Sivaramakrishnan Natarajan, et al.
VLDB
Sabine Deligne, Ellen Eide, et al.
INTERSPEECH - Eurospeech 2001
Raghu Krishnapuram, Krishna Kummamuru
IFSA 2003
Indranil R. Bardhan, Sugato Bagchi, et al.
JMIS