A 22 Gbit/s PAM-4 receiver in 90nm CMOS-SOI technology
Thomas Toifl, Christian Menolfi, et al.
VLSI Circuits 2005
In this letter, we show how a prefilter can be automatically adapted to open the data eye in a nonreturn to zero transmission system using only two binary samples per bit. Although the equalizer primarily aims to minimize timing jitter with a zero-forcing criterion, this equalization method also results in nearly optimum vertical eye opening, thereby causing very little overhead in complexity and power consumption. The target application is low-power high-speed serial links to transfer data between chips over a printed circuit board. © 2006 IEEE.
Thomas Toifl, Christian Menolfi, et al.
VLSI Circuits 2005
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APEC 2013
Lukas Kull, Thomas Toifl, et al.
ISSCC 2013
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VLSI Circuits 2012