Conference paper
Effect of HCI degradation on the variability of MOSFETS
C. Zhou, Keith A. Jenkins, et al.
IRPS 2018
A technique is presented to measure the temperature of a large, dense, CMOS clock buffer while it is operating. The technique uses the subthreshold slope of a single pFET, thereby avoiding introducing special technology enhancements for thermal sensing, and uses purely simple electrical measurements. The technique is demonstrated to work in the presence of high-frequency digital switching in a realistic test site fabricated in a 14 nm finFET technology.
C. Zhou, Keith A. Jenkins, et al.
IRPS 2018
Alina Deutsch, Gerard V. Kopcsay, et al.
IEEE T-MTT
Phillip J. Restle, Craig A. Carter, et al.
Digest of Technical Papers-IEEE International Solid-State Circuits Conference
Linda M. Geppert, David F. Heidel, et al.
IEEE Journal of Solid-State Circuits