Dinkar V. Singh, Keith A. Jenkins, et al.
IEEE TNANO
A technique is presented to measure the temperature of a large, dense, CMOS clock buffer while it is operating. The technique uses the subthreshold slope of a single pFET, thereby avoiding introducing special technology enhancements for thermal sensing, and uses purely simple electrical measurements. The technique is demonstrated to work in the presence of high-frequency digital switching in a realistic test site fabricated in a 14 nm finFET technology.
Dinkar V. Singh, Keith A. Jenkins, et al.
IEEE TNANO
Shu-Jen Han, Satoshi Oida, et al.
DRC 2013
Andrea Bahgat Shehata, Alessandro Ruggeri, et al.
SPIE Nanoscience + Engineering 2015
Keith A. Jenkins, Eduard Cartier, et al.
IEEE Electron Device Letters