Asen Asenov, Binjie Cheng, et al.
IEEE T-ED
Power grids for sub-micron large integrated circuits are performance limiting factors due to the large power dissipated (e.g. 100 W at 1.8 V). The analysis of such power grids is important in order to predict and possibly improve the performance. Current classical analysis methods are falling behind as grids become ever larger. This paper proposes a new efficient analysis method suitable for both DC and transient simulation of large power grids.
Asen Asenov, Binjie Cheng, et al.
IEEE T-ED
Peng Li, Frank Liu, et al.
DATE 2005
Sani R. Nassif
SISPAD 2006
Emrah Acar, Kanak Agarwal, et al.
ISCAS 2006