Thomas R. Puzak, A. Hartstein, et al.
CF 2007
Thermal scanning probe lithography combines high-resolution patterning capabilities with the ability to read topography without causing resist exposure. As such, it is an ideal candidate for the implementation of markerless pattern overlay. This approach eliminates errors arising from marker degradation and inconsistencies in the positioning hardware used for reading and writing. Here, we outline our implementation and characterization of a markerless lithography process. We demonstrate theoretically and experimentally that alignment errors below 5 nm are possible for micron-sized features having an amplitude of just 4 nm. Further, we show that following proper calibration, a limiting overlay accuracy of 1.1 nm per axis is achievable.
Thomas R. Puzak, A. Hartstein, et al.
CF 2007
Lerong Cheng, Jinjun Xiong, et al.
ASP-DAC 2008
Ohad Shamir, Sivan Sabato, et al.
Theoretical Computer Science
Alfonso P. Cardenas, Larry F. Bowman, et al.
ACM Annual Conference 1975