Youngseok Kim, Soon-Cheon Seo, et al.
IEEE Electron Device Letters
Resistive crossbar arrays are promising options for accelerating enormous computation needed for training modern deep neural networks (DNNs). However, verification of this idea has not been scaled up to realistically sized DNNs due to the nonideal device behavior and hardware design constraints. In this article, the authors propose a novel simulation framework to explore such design constraints on the large-scale problems and devise algorithmic measures to pave the way for robust resistive crossbar-based DNN training accelerators. - Jungwook Choi, IBM Research.
Youngseok Kim, Soon-Cheon Seo, et al.
IEEE Electron Device Letters
Wilfried Haensch
IEDM 2018
Katherine Spoon, Hsinyu Tsai, et al.
Frontiers in Computational Neuroscience
Bruce Doris, Meikei Ieong, et al.
IEDM 2002