Fan Zhang, Junwei Cao, et al.
IEEE TETC
In a modern chip development cycle non-mainline / non- functional verication is gaining importance compared to traditional functional vercation tasks and takes up to one third of the total verication effort. The purpose of non- mainline logic is to operate, maintain, and debug the chip. Ever-increasing complexity of the chip, thus, directly affects the complexity of the non-mainline logic and as a result, the verication thereof. Moreover, the non-mainline world is no longer pure hardware, but an intricate mix of software and hardware. Copyright 2014 ACM.
Fan Zhang, Junwei Cao, et al.
IEEE TETC
Mahmoud Elbayoumi, Mihir Choudhuryy, et al.
DAC 2014
David S. Kung
DAC 1998
Rajeev Gupta, Shourya Roy, et al.
ICAC 2006