A DAC/ADC-Based Wireline Transceiver Datapath Functional Verification on RFSoC Platform
- Jaewon Lee
- Seoyoung Jang
- et al.
- 2024
- IEEE TCAS-II
Paper
Publications
7 results for Abdullah Serdar Yonar
An 8b 1.0-to-1.25GS/s 0.7-to-0.8V Single-Stage Time-Based Gated-Ring-Oscillator ADC with 2× Interpolating Sense-Amplifier-Latches
- Abdullah Serdar Yonar
- Pier Andrea Francese
- et al.
- 2023
- ISSCC 2023
Conference paperAn 8b 1.0-to-1.25 GS/s Time-Based ADC With Bipolar VTC and Sense Amplifier Latch Interpolated Gated Ring Oscillator TDC
- A. Serdar Yonar
- Pier Andrea Francese
- et al.
- 2023
- IEEE SSC-L
PaperAn 8-bit 56GS/s 64x Time-Interleaved ADC with Bootstrapped Sampler and Class-AB Buffer in 4nm CMOS
- A. Serdar Yonar
- Pier Andrea Francese
- et al.
- 2022
- VLSI Technology and Circuits 2022
Conference paperAn 8b DAC-Based SST TX Using Metal Gate Resistors with 1.4pJ/b Efficiency at 112Gb/s PAM-4 and 8-Tap FFE in 7iim CMOS
- Marcel Kossel
- Vishal Khatri
- et al.
- 2021
- ISSCC 2021
Conference paperAn In-Comparator Aperture-Time Equalization in a 7-nm FinFET CMOS 40-Gb/s Receiver
- Abdullah Serdar Yonar
- Pier Andrea Francese
- et al.
- 2020
- IEEE SSC-L
PaperBBPD with wide input phase range
- Marcel Kossel
- Pier Andrea Francese
- et al.
- 2019
- Electronics Letters
Paper