Design and implementation of differential cascode voltage switch with pass-gate (DCVSPG) logic for high-performance digital systems
- Fang-Shi Lai
- Wei Hwang
- 1997
- IEEE Journal of Solid-State Circuits
Paper
Publications
9 results for Fang-shi Lai
240 MHz 8-tap programmable FIR filter for disk-drive read channels
- L. Thon
- Pantas Sutardja
- et al.
- 1995
- ISSCC 1995
Conference paperDifferential cascode voltage switch with the pass-gate (DCVSPG) logic tree for high performance CMOS digital systems
- F.S. Lai
- W. Hwang
- 1993
- VLSI-TSA 1993
Conference paperThe Efficient Implementation and Analysis of a Hybrid Number System Processor
- Fang-shi Lai
- 1993
- IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing
PaperThe architecture and analysis of a hybrid number system processor
- F.S. Lai
- 1992
- ISCAS 1992
Conference paperA Hybrid Number System Processor with Geometric and Complex Arithmetic Capabilities
- Fang-Shi Lai
- Ching-Farn Eric Wu
- 1991
- IEEE TC
PaperA 10-ns Hybrid Number System Data Execution Unit for Digital Signal Processing Systems
- Fang-shi Lai
- 1991
- IEEE Journal of Solid-State Circuits
PaperDesign of a 100 MHz hybrid number system data execution unit
- F.S. Lai
- 1990
- VLSI Circuits 1990
Conference paperHybrid number system multiplier for graphics and complex arithmetic applications
- F.S. Lai
- C.E. Wu
- 1989
- VLSI-TSA 1989
Conference paper