Blanket SMT with in situ N2 plasma treatment on the lang;100〉 wafer for the low-cost low-power technology applicationJun YuanVictor Chanet al.2009IEEE Electron Device LettersPaper
A 45nm low power bulk technology featuring carbon co-implantation and laser anneal on 45°-rotated substrateJ. YuanV. Chanet al.2008ICSICT 2008Conference paper
High performance transistors featured in an aggressively scaled 45nm bulk CMOS technologyZ. LuoN. Rovedoet al.2007VLSI Technology 2007Conference paper
Stress proximity technique for performance improvement with dual stress liner at 45nm technology and beyondX. ChenS. Fanget al.2006VLSI Technology 2006Conference paper