Strain for CMOS performance improvement
- Victor Chan
- Ken Rim
- et al.
- 2005
- CICC 2005
Conference paper
Publications
90 results for Meikei Ieong
Threshold voltage control in NiSi-Gated MOSFETs through SIIS
- Jakub Kedzierski
- Diane Boyd
- et al.
- 2005
- IEEE Transactions on Electron Devices
PaperSilicon device scaling to the sub-10-nm regime
- Meikei Ieong
- Bruce Doris
- et al.
- 2004
- Science
ReviewFabrication of metal gated FinFETs through complete gate silicidation with Ni
- Jakub Kedzierski
- Meikei Ieong
- et al.
- 2004
- IEEE Transactions on Electron Devices
PaperSelectively formed high mobility strained Ge PMOSFETs for high performance CMOS
- Hulling Shang
- Jack O. Chu
- et al.
- 2004
- IEDM 2004
Conference paperAggressively scaled (0.143 μm 2) 6T-SRAM cell for the 32 nm node and beyond
- D. Fried
- J. Hergenrother
- et al.
- 2004
- IEDM 2004
Conference paperAdvanced gate stacks with fully silicided (FUSI) gates and high-κ dielectrics: Enhanced performance at reduced gate leakage
- E. Gusev
- C. Cabral Jr.
- et al.
- 2004
- IEDM 2004
Conference paperScaling beyond conventional CMOS device
- Meikei Ieong
- Bruce Doris
- et al.
- 2004
- ICSICT 2004
Conference paperPerformance comparison and channel length scaling of strained Si FETs on SiGe-on-insulator (SGOI)
- J. Cai
- K. Rim
- et al.
- 2004
- IEDM 2004
Conference paperSub-30 NM abrupt junction formation in strained silicon/silicon-germanium CMOS device
- K.-L. Lee
- F. Cardone
- et al.
- 2004
- ECS Meeting 2004
Conference paper