High-efficiency 60 GHz antenna fabricated using low-cost silicon micromachining techniques
- N. Hoivik
- D. Liu
- et al.
- 2007
- APS 2007
Conference paper
Publications
36 results for Chirag S. Patel
Assembly, characterization, and reworkability of Pb-free ultra-fine pitch C4s for system-on-package
- B. Dang
- S.L. Wright
- et al.
- 2007
- ECTC 2007
Conference paper3D chip stacking technology with low-volume lead-free interconnections
- K. Sakuma
- P. Andry
- et al.
- 2007
- ECTC 2007
Conference paperCMOS-compatible through silicon vias for 3D process integration
- Cornelia K. Tsang
- Paul S. Andry
- et al.
- 2006
- MRS Fall Meeting 2006
Conference paperSystem-on-Package (SOP) technology, characterization and applications
- J. Knickerbocker
- P. Andry
- et al.
- 2006
- ECTC 2006
Conference paperPb-free micro-joints (50 μm pitch) for the next generation micro-systems: The fabrication, assembly and characterization
- H. Gan
- S.L. Wright
- et al.
- 2006
- ECTC 2006
Conference paperCharacterization of micro-bump C4 interconnects for Si-carrier SOP applications
- S.L. Wright
- R.J. Polastre
- et al.
- 2006
- ECTC 2006
Conference paperA CMOS-compatible process for fabricating electrical through-vias in silicon
- P. Andry
- C. Tsang
- et al.
- 2006
- ECTC 2006
Conference paperTerabus: Terabit/second-class card-level optical interconnect technologies
- Laurent Schares
- Jeffrey A. Kash
- et al.
- 2006
- IEEE Journal on Selected Topics in Quantum Electronics
Paper3-D silicon integration and silicon packaging technology using silicon through-vias
- John U. Knickerbocker
- Chirag S. Patel
- et al.
- 2006
- IEEE Journal of Solid-State Circuits
Paper