Publications

3 results for M. Zaleski

High performance 32nm SOI CMOS with high-k/metal gate and 0.149μm ² SRAM and ultra low-k back end with eleven levels of copper
- - B. Greene
  - Q. Liang
  - et al.
- 2009
- VLSI Technology 2009
Conference paper
32nm general purpose bulk CMOS technology for high performance applications at low voltage
- - F. Arnaud
  - J. Liu
  - et al.
- 2008
- IEDM 2008
Conference paper
A cost effective 32nm high-K/metal gate CMOS technology for low power applications with single-metal/gate-first process
- - X. Chen
  - S. Samavedam
  - et al.
- 2008
- VLSI Technology 2008
Conference paper