High performance 65 nm SOI technology with enhanced transistor strain and advanced-low-K BEOLW.-H. LeeA. Waiteet al.2005IEDM 2005Conference paper
Device Design Considerations for Ultra-Thin SOI MOSFETsB. DorisM. Ieonget al.2003IEDM 2003Conference paper
Electrical integrity of state-of-the-art 0.13 μm SOI CMOS devices and circuits transferred for three-dimensional (3D) integrated circuit (IC) fabricationK.W. GuariniA. Topolet al.2002IEDM 2002Conference paper