Extremely scaled gate-first high-k/metal gate stack with EOT of 0.55 nm using novel interfacial layer scavenging techniques for 22nm technology node and beyond
- K. Choi
- H. Jagannathan
- et al.
- 2009
- VLSI Technology 2009
Conference paper
Publications
96 results for Barry P. Linder
pFET V t control with HfO 2/TiN/poly-Si gate stack using a lateral oxygenation process
- B. Cartier
- M. Steen
- et al.
- 2009
- VLSI Technology 2009
Conference paperThe effect of interface thickness of high-k/metal gate stacks on NFET dielectric reliability
- Barry P. Linder
- Eduard Cartier
- et al.
- 2009
- IRPS 2009
Conference paperTDDB failure distribution of metal gate / high-k CMOS devices on SOI substrates
- A. Kerber
- E. Cartier
- et al.
- 2009
- IRPS 2009
Conference paperInterfacial layer optimization of high-k/metal gate stacks for low temperature processing
- Barry P. Linder
- Vijay Narayanan
- et al.
- 2009
- Microelectronic Engineering
PaperHigh-K gate dielectric structures by atomic layer deposition for the 32nm and beyond nodes
- R.D. Clark
- S. Consiglio
- et al.
- 2008
- ECS Meeting 2008
Conference paperHigh-performance high-κ/metal gates for 45nm CMOS and beyond with gate-first processing
- M. Chudzik
- B. Doris
- et al.
- 2007
- VLSI Technology 2007
Conference paperProcess and electrical characteristics of MO-ALD HfO2 films for high-K gate applications grown in a production-worthy 300 mm deposition system
- R.D. Clark
- C.S. Wajda
- et al.
- 2007
- ECS Meeting 2007
Conference paperBand edge high-K /metal gate n-MOSFETs using ultra thin capping layers
- V.K. Paruchuri
- V. Narayanan
- et al.
- 2007
- VLSI-TSA 2007
Conference paperRecent advances and current challenges in the search for high mobility band-edge high-k/metal gate stacks
- V. Narayanan
- V.K. Paruchuri
- et al.
- 2007
- Microelectronic Engineering
Paper