High performance transistors featured in an aggressively scaled 45nm bulk CMOS technology
- Z. Luo
- N. Rovedo
- et al.
- 2007
- VLSI Technology 2007
Conference paper
Publications
4 results for Z. Yang
A 45nm low cost low power platform by using integrated dual-stress-liner technology
- J. Yuan
- S.S. Tan
- et al.
- 2006
- VLSI Technology 2006
Conference paperSiGe heterojunction bipolar transistors and circuits toward terahertz communication applications
- Jae-Sung Rieh
- Basanth Jagannathan
- et al.
- 2004
- IEEE T-MTT
PaperSige HBT performance and reliability trends through fT of 350GHz
- Greg Freeman
- Jae-Sung Rieh
- et al.
- 2003
- IRPS 2003
Conference paper