Lateral InAs/Si p-Type Tunnel FETs Integrated on Si - Part 2: Simulation Study of the Impact of Interface Traps
- Saurabh Sant
- Kirsten E. Moselund
- et al.
- 2016
- IEEE T-ED
Paper
Publications
23 results for Mattias Borg
Investigation of doping in InAs/GaSb hetero-junctions for tunnel-FETs
- D. Cutaia
- Heinz Schmid
- et al.
- 2016
- SNW 2016
Conference paperComplementary III-V heterojunction lateral NW Tunnel FET technology on Si
- D. Cutaia
- Kirsten E. Moselund
- et al.
- 2016
- VLSI Technology 2016
Conference paperLocal Magnetic Suppression of Topological Surface States in Bi2Te3 Nanowires
- Johannes Gooth
- R. Zierold
- et al.
- 2016
- ACS Nano
PaperBroadening of length distributions of Au-catalyzed InAs nanowires
- Yury Berdnikov
- Nikolay Sibirev
- et al.
- 2016
- STRANN 2016
Conference paperLength Distributions of Nanowires Growing by Surface Diffusion
- Vladimir Dubrovskii
- Yury Berdnikov
- et al.
- 2016
- Crystal Growth and Design
PaperIII-V device integration on Si using template-assisted selective epitaxy
- Heinz Schmid
- Mattias Borg
- et al.
- 2015
- DRC 2015
Conference paperTemplate-assisted selective epitaxy of III-V nanoscale devices for co-planar heterogeneous integration with Si
- Heinz Schmid
- Mattias Borg
- et al.
- 2015
- Applied Physics Letters
PaperVertical InAs-Si gate-all-around tunnel FETs integrated on Si using selective epitaxy in nanotube templates
- D. Cutaia
- Kirsten E. Moselund
- et al.
- 2015
- IEEE J-EDS
PaperMechanisms of template-assisted selective epitaxy of InAs nanowires on Si
- Mattias Borg
- Heinz Schmid
- et al.
- 2015
- Journal of Applied Physics
Paper