A no-verification Multi-Level-Cell (MLC) operation in Cross-Point OTS-PCM
- Nanbo Gong
- W. Chien
- et al.
- 2020
- VLSI Technology 2020
Conference paper
Publications
8 results for C. Yang
Si Incorporation Into AsSeGe Chalcogenides for High Thermal Stability, High Endurance and Extremely Low Vth Drift 3D Stackable Cross-point Memory
- Huai-Yu Cheng
- I. Kuo
- et al.
- 2020
- VLSI Technology 2020
Conference paperComprehensive Scaling Study on 3D Cross-Point PCM toward 1Znm Node for SCM Applications
- W. Chien
- H. Ho
- et al.
- 2019
- VLSI Technology 2019
Conference paperSolution for PCM and OTS intermixing on cross-point phase change memory
- W. Chien
- Lynne Gignac
- et al.
- 2019
- IMW 2019
Conference paperSuperb endurance and appropriate Vth of PCM pillar cell using buffer layer for 3D cross-point memory
- N. Gang
- W. Chien
- et al.
- 2019
- IMW 2019
Conference paperA study on OTS-PCM pillar cell for 3-d stackable memory
- W. Chien
- C. Yeh
- et al.
- 2018
- IEEE T-ED
PaperHigh endurance self-heating OTS-PCM pillar cell for 3D stackable memory
- C. Yeh
- W. Chien
- et al.
- 2018
- VLSI Technology 2018
Conference paperAn ultra high endurance and thermally stable selector based on TeAsGeSiSe chalcogenides compatible with BEOL IC Integration for cross-point PCM
- Huai-Yu Cheng
- W. Chien
- et al.
- 2017
- IEDM 2017
Conference paper