DC and RF characterization of InGaAs replacement metal gate (RMG) nFETs on SiGe-OI FinFETs fabricated by 3D monolithic integration
- Veeresh Deshpande
- V. Djara
- et al.
- 2017
- Solid-State Electronics
Paper
Publications
55 results for Pouya Hashemi
Prospects of high-Ge-content strained SiGe for advanced FinFET generations
- Pouya Hashemi
- Karthik Balakrishnan
- et al.
- 2016
- PRiME/ECS Meeting 2016
Conference paperDemonstration of record SiGe transconductance and short-channel current drive in High-Ge-Content SiGe PMOS FinFETs with improved junction and scaled EOT
- Pouya Hashemi
- Kam-Leung Lee
- et al.
- 2016
- VLSI Technology 2016
Conference paperReplacement high-K/metal-gate High-Ge-content strained SiGe FinFETs with high hole mobility and excellent SS and reliability at aggressive EOT ∼7Å and scaled dimensions down to sub-4nm fin widths
- Pouya Hashemi
- Takashi Ando
- et al.
- 2016
- VLSI Technology 2016
Conference paperFINFET technology featuring high mobility SiGe channel for 10nm and beyond
- Dechao Guo
- G. Karve
- et al.
- 2016
- VLSI Technology 2016
Conference paperFirst RF characterization of InGaAs replacement metal gate (RMG) nFETs on SiGe-OI FinFETs fabricated by 3D monolithic integration
- Veeresh Deshpande
- V. Djara
- et al.
- 2016
- EUROSOI-ULIS 2016
Conference paperHigh-mobility high-Ge-content Si1-xGex-OI PMOS FinFETs with fins formed using 3D germanium condensation with Ge fraction up to x∼ 0.7, scaled EOT∼8.5Å and ∼10nm fin width
- Pouya Hashemi
- Takashi Ando
- et al.
- 2015
- VLSI Circuits 2015
Conference paperHigh-mobility High-Ge-Content Si1-xGex-OI PMOS FinFETs with fins formed using 3D germanium condensation with Ge fraction up to x∼ 0.7, scaled EOT∼8.5Å and ∼10nm fin width
- Pouya Hashemi
- Takashi Ando
- et al.
- 2015
- VLSI Technology 2015
Conference paperStrained-SiGe channel FinFETs for high-performance CMOS: Opportunities and challenges
- Pouya Hashemi
- Karthik Balakrishnan
- et al.
- 2015
- ECS Meeting 2015 Chicago
Conference paperFirst demonstration of high-Ge-content strained-Si1-xGex (x=0.5) on insulator PMOS FinFETs with high hole mobility and aggressively scaled fin dimensions and gate lengths for high-performance applications
- Pouya Hashemi
- Karthik Balakrishnan
- et al.
- 2014
- IEDM 2014
Conference paper