Triple-self-aligned, planar double-gate MOSFETs: Devices and circuits
- K.W. Guarini
- P. Solomon
- et al.
- 2001
- Technical Digest-International Electron Devices Meeting
Paper
Publications
114 results for H.-S. Philip Wong
Preparation of 200 mm silicon substrates with metal ground-plane for double-gate SOI devices
- L.J. Huang
- K.K. Chan
- et al.
- 2000
- IEEE International SOI Conference 2000
Conference paperAnalysis of the design space available for high-k gate dielectrics in nanoscale MOSFETs
- David J. Frank
- Hon-Sum P. Wong
- 2000
- Superlattices and Microstructures
PaperFuture prospects for Si CMOS technology
- D.J. Frank
- Y. Taur
- et al.
- 1999
- DRC 1999
PaperMonte Carlo modeling of threshold variation due to dopant fluctuations
- D.J. Frank
- Y. Taur
- et al.
- 1999
- VLSI Circuits 1999
Conference paperMonte Carlo modeling of threshold variation due to dopant fluctuations
- D.J. Frank
- Y. Taur
- et al.
- 1999
- VLSI Technology 1999
Conference paperCharacterization of the silicon on insulator film in bonded wafers by high resolution X-ray diffraction
- G.M. Cohen
- P.M. Mooney
- et al.
- 1999
- Applied Physics Letters
PaperTransient enhanced diffusion and dose loss of indium in silicon
- Omer Dokumaci
- Paul Ronsheim
- et al.
- 1999
- MRS Spring Meeting 1999
PaperNanoscale CMOS
- Hon-Sum Philip Wong
- David J. Frank
- et al.
- 1999
- Proceedings of the IEEE
PaperMonitoring hot-carrier degradation in SOI MOSFET's by hot-carrier luminescence techniques
- Luca Selmi
- Maura Pavesi
- et al.
- 1998
- IEEE Transactions on Electron Devices
Paper