2nd Generation dual-channel optimization with cSiGe for 22nm HP technology and beyond
- C. Ortolland
- Daniel Jaeger
- et al.
- 2013
- IEDM 2013
Conference paper
Publications
79 results for Jin Cai
SOI lateral bipolar transistor with drive current >3mA/μm
- J. Cai
- Tak H. Ning
- et al.
- 2013
- S3S 2013
Conference paperLow-power circuit analysis and design based on heterojunction tunneling transistors (HETTs)
- Yoonmyung Lee
- Daeyeon Kim
- et al.
- 2013
- IEEE Transactions on VLSI Systems
PaperMeeting the challenge of multiple threshold voltages in highly scaled undoped FinFETs
- Ramachandran Muralidhar
- Jin Cai
- et al.
- 2013
- IEEE T-ED
PaperOn the performance and scaling of symmetric lateral bipolar transistors on SOI
- Tak H. Ning
- Jin Cai
- 2013
- IEEE J-EDS
Paper22nm High-performance SOI technology featuring dual-embedded stressors, Epi-Plate High-K deep-trench embedded DRAM and self-aligned Via 15LM BEOL
- S. Narasimha
- P. Chang
- et al.
- 2012
- IEDM 2012
Conference paperA comparison of short-channel control in planar bulk and fully depleted devices
- Ramachandran Muralidhar
- Jin Cai
- et al.
- 2012
- IEEE Electron Device Letters
PaperAssessment of fully-depleted planar CMOS for low power complex circuit operation
- Zhibin Ren
- S. Mehta
- et al.
- 2011
- IEDM 2011
Conference paperA manufacturable dual channel (Si and SiGe) high-k metal gate CMOS technology with multiple oxides for high performance and low power applications
- S. Krishnan
- U. Kwon
- et al.
- 2011
- IEDM 2011
Conference paperComplementary thin-base symmetric lateral bipolar transistors on SOI
- Jin Cai
- Tak H. Ning
- et al.
- 2011
- IEDM 2011
Conference paper