A 24-channel 300 Gb/s 8.2 pJ/bit full-duplex fiber-coupled optical transceiver module based on a single "Holey" CMOS IC
- Alexander V. Rylyakov
- Clint L. Schow
- et al.
- 2010
- OFC 2010
Conference paper
Publications
156 results for Alexander V. Rylyakov
A 7.5-GS/s 3.8-ENOB 52-mW flash ADC with clock duty cycle control in 65nm CMOS
- Hayun Chung
- Alexander Rylyakov
- et al.
- 2009
- VLSI Circuits 2009
Conference paperA 19gb/s 38mW 1-tap speculative DFE receiver in 90nm CMOS
- Didem Z. Turker
- Alexander Rylyakov
- et al.
- 2009
- VLSI Circuits 2009
Conference paperBang-bang digital PLLS at 11 and 20GHz with sub-200fs integrated jitter for high-speed serial communication applications
- A. Rylyakov
- J. Tierno
- et al.
- 2009
- ISSCC 2009
Conference paperA 136-GHz dynamic divider in SiGe technology
- Ekaterina Laskin
- Alexander Rylyakov
- 2009
- SiRF 2009
Conference paperLow-power 16 x 10 Gb/s Bi-directional single chip CMOS optical transceivers operating at <5 mW/Gb/s/link
- Clint L. Schow
- Fuad E. Doany
- et al.
- 2009
- IEEE Journal of Solid-State Circuits
PaperA wide tuning range (1 GHz-to-15 GHz) fractional-N all-digital PLL in 45nm SOI
- Alexander Rylyakov
- Jose Tierno
- et al.
- 2008
- CICC 2008
Conference paperA 90-Gb/s 2:1 Multiplexer with 1-Tap FFE in SiGe Technology
- Ekaterina Laskin
- Alexander Rylyakov
- 2008
- CSICS 2008
Conference paperA <5mW/Gb/s/link, 16×10Gb/s bi-directional single-chip CMOS optical transceiver for board-level optical interconnects
- Clint Schow
- Fuad Doany
- et al.
- 2008
- ISSCC 2008
Conference paperA modular all-digital PLL architecture enabling both 1-to-2GHz and 24-to-32GHz operation in 65NM CMOS
- A. Rylyakov
- J. Tierno
- et al.
- 2008
- ISSCC 2008
Conference paper