Enhancing 3D XPT/SOM Reliability: Strategies for Mitigating Spike Current and Improving Read Endurance
- C.L. Sung
- D. Daudelin
- et al.
- 2025
- IMW 2025
Conference paper
Publications
8 results for Richard C. Jordan
A Double-Data-Rate 2 (DDR2) Interface Phase-Change Memory with 533MB/s Read-Write Data Rate and 37.5ns Access Latency for Memory-Type Storage Class Memory Applications
- H. Lung
- C. Miller
- et al.
- 2016
- IMW 2016
Conference paperNVM neuromorphic core with 64k-cell (256-by-256) phase change memory synaptic array with on-chip neuron circuits for continuous in-situ learning
- Sangbum Kim
- Masatoshi Ishii
- et al.
- 2015
- IEDM 2015
Conference paper1Mb 0.41 μm2 2T-2R cell nonvolatile TCAM with two-bit encoding and clocked self-referenced sensing
- Jing Li
- Robert Montoye
- et al.
- 2013
- VLSI Circuits 2013
Conference paper1Mb 0.41 μm2 2T-2R cell nonvolatile TCAM with two-bit encoding and clocked self-referenced sensing
- Jing Li
- Robert Montoye
- et al.
- 2013
- VLSI Technology 2013
Conference paperA 256-mcell phase-change memory chip operating at 2+ bit/cell
- Gael F. Close
- Urs Frey
- et al.
- 2013
- IEEE TCAS-I
PaperA 512Mb phase-change memory (PCM) in 90nm CMOS achieving 2b/cell
- Gael F. Close
- Urs Frey
- et al.
- 2011
- VLSI Circuits 2011
Conference paperA novel reconfigurable sensing scheme for variable level storage in phase change memory
- Jing Li
- Chao-I Wu
- et al.
- 2011
- IMW 2011
Conference paper