Polynomial Time Algorithm for Area and Power Efficient Adder Synthesis in High-Performance Designs
- Subhendu Roy
- Mihir Choudhury
- et al.
- 2016
- IEEE TCADIS
Paper
Publications
4 results for Subhendu Roy
Polynomial time algorithm for area and power efficient adder synthesis in high-performance designs
- Subhendu Roy
- Mihir Choudhury
- et al.
- 2015
- ASP-DAC 2015
Conference paperTowards optimal performance-area trade-off in adders by synthesis of parallel prefix structures
- Subhendu Roy
- Mihir Choudhury
- et al.
- 2014
- IEEE TCADIS
PaperTowards optimal performance-area trade-off in adders by synthesis of parallel prefix structures
- Subhendu Roy
- Mihir Choudhury
- et al.
- 2013
- DAC 2013
Conference paper