Leakage power analysis of 25-nm double-gate CMOS devices and circuits
- Keunwoo Kim
- Koushik K. Das
- et al.
- 2005
- IEEE Transactions on Electron Devices
Paper
Publications
79 results for Keunwoo Kim
FinFET SRAM for high-performance low-power applications
- Rajiv V. Joshi
- Richard Q. Williams
- et al.
- 2004
- ESSDERC/ESSCIRC 2004
Conference paperNovel high-density low-power high-performance double-gate logic techniques
- Meng-Hsueh Chiang
- Keunwoo Kim
- et al.
- 2004
- IEEE International SOI Conference 2004
Conference paperNanoscale CMOS circuit leakage power reduction By Double-gate device
- Keunwoo Kim
- Koushik K. Das
- et al.
- 2004
- ISLPED 2004
Conference paperNanoscale CMOS Circuit Leakage Power Reduction by Double-Gate Device
- Keunwoo Kim
- Koushik K. Das
- et al.
- 2004
- ISLPED 2004
Conference paperCompact modeling methodology of strained-Si channel-on-insulator (SSOI) MOSFETs
- Keunwoo Kim
- Ching-Te Chuang
- et al.
- 2004
- International Journal of Electronics
PaperProcess/physics-based threshold voltage model for nano-scaled double-gate devices
- Keunwoo Kim
- Jerry G. Fossum
- et al.
- 2004
- International Journal of Electronics
PaperPerformance assessment of scaled strained-Si channel-on-insulator (SSOI) CMOS
- Keunwoo Kim
- Ching-Te Chuang
- et al.
- 2004
- Solid-State Electronics
PaperPower analysis of strained-Si devices/circuits
- Keunwoo Kim
- Rajiv V. Joshi
- et al.
- 2004
- Solid-State Electronics
PaperScaling planar silicon devices
- Ching-Te Chuang
- Kerry Bernstein
- et al.
- 2004
- IEEE Circuits and Devices Magazine
Paper