Predictive Guardbanding: Program-Driven Timing Margin Reduction for GPUs
- Jingwen Leng
- Alper Buyuktosunoglu
- et al.
- 2021
- IEEE TCADIS
Paper
Publications
141 results for Pradip Bose
The POWER Processor Family: A Historical Perspective from the Viewpoint of Presilicon Modeling
- Pradip Bose
- 2021
- IEEE Micro
PaperAsymmetric resilience: Exploiting task-level idempotency for transient error recovery in accelerator-based systems
- Jingwen Leng
- Alper Buyuktosunoglu
- et al.
- 2020
- HPCA 2020
Conference paper(Invited) cross-layer resilience: Challenges, insights, and the road ahead
- Eric Cheng
- Daniel Mueller-Gritschneder
- et al.
- 2019
- DAC 2019
Conference paperGeneration of Stressmarks for Early Stage Soft-Error Modeling
- 2019
- DSN-S 2019
Conference paperResilient low voltage accelerators for high energy efficiency
- Nandhini Chandramoorthy
- Karthik Swaminathan
- et al.
- 2019
- HPCA 2019
Conference paperAsymmetric Resilience for Accelerator-Rich Systems
- Jingwen Leng
- Alper Buyuktosunoglu
- et al.
- 2019
- IEEE Computer Architecture Letters
PaperChopStiX: Systematic Extraction of Code-Representative Microbenchmarks
- Calvin Bulla
- Lluc Alvarez
- et al.
- 2018
- IISWC 2018
Conference paperTowards 'Smarter' Vehicles Through Cloud-Backed Swarm Cognition
- Augusto Vega
- Alper Buyuktosunoglu
- et al.
- 2018
- IV 2018
Conference paperTolerating soft errors in processor cores using CLEAR (cross-layer exploration for architecting resilience)
- Eric Cheng
- Shahrzad Mirkhani
- et al.
- 2018
- IEEE TCADIS
Paper