Sensitivity of SOI Lateral Diodes for Bolometric Sensing
- Dan Corcos
- Danny Elad
- et al.
- 2018
- IRMMW-THz 2018
Conference paper
Publications
149 results for Thomas Morf
A 50GB/S 1.6PJ/B RX Data-Path with Quarter-Rate 3-Tap Speculative DFE
- Pier Andrea Francese
- Alessandro Cevrero
- et al.
- 2018
- VLSI Circuits 2018
Conference paperA 10-Bit 20-40 GS/S ADC with 37 dB SNDR at 40 GHz Input Using First Order Sampling Bandwidth Calibration
- Lukas Kull
- Danny Luu
- et al.
- 2018
- VLSI Circuits 2018
Conference paperA 0.3PJ/Bit 112GB/S PAM4 1+0.5D TX-DFE Precoder and 8-Tap FFE in 14NM CMOS
- Thomas Toifl
- Christian Menolfi
- et al.
- 2018
- VLSI Circuits 2018
Conference paperDesign Techniques for High-Speed Multi-Level Viterbi Detectors and Trellis-Coded-Modulation Decoders
- Hazar Yueksel
- Matthias Braendli
- et al.
- 2018
- IEEE TCAS-I
Paper4×40 Gb/s 2 pJ/bit optical RX with 8ns power-on and CDR-lock time in 14nm CMOS
- Alessandro Cevrero
- Ilter Ozkaya
- et al.
- 2018
- OFC 2018
Conference paperParallel Implementation Technique of Digital Equalizer for Ultra-High-Speed Wireline Receiver
- Gain Kim
- Lukas Kull
- et al.
- 2018
- ISCAS 2018
Conference paperA 60-Gb/s 1.9-pJ/bit NRZ Optical Receiver with Low-Latency Digital CDR in 14-nm CMOS FinFET
- Ilter Ozkaya
- Alessandro Cevrero
- et al.
- 2018
- IEEE JSSC
PaperA 24-to-72GS/s 8b time-interleaved SAR ADC with 2.0-to-3.3pJ/conversion and >30dB SNDR at nyquist in 14nm CMOS FinFET
- Lukas Kull
- Danny Luu
- et al.
- 2018
- ISSCC 2018
Conference paperA 56Gb/s burst-mode NRZ optical receiver with 6.8ns power-on and CDR-Lock time for adaptive optical links in 14nm FinFET CMOS
- Ilter Ozkaya
- Alessandro Cevrero
- et al.
- 2018
- ISSCC 2018
Conference paper