VDD scaling for FinFET logic and memory circuits: The impact of process variations and SRAM stability
- C.-H. Lin
- K. Das
- et al.
- 2006
- VLSI-TSA 2006
Conference paper
Publications
61 results for Leland Chang
Scalability options for future SRAM memories
- Stephen V. Kosonocky
- Azeez Bhavnagarwala
- et al.
- 2006
- ICSICT 2006
Conference paperUltralow-voltage minimum-energy CMOS
- Scott Hanson
- Bo Zhai
- et al.
- 2006
- IBM J. Res. Dev
ReviewStable SRAM cell design for the 32 nm node and beyond
- Leland Chang
- David M. Fried
- et al.
- 2005
- VLSI Technology 2005
Conference paperHigh performance FDSOI CMOS technology with metal gate and high-k
- Bruce Doris
- Y.-H. Kim
- et al.
- 2005
- VLSI Technology 2005
Conference paperMobility and CMOS devices/circuits on sub-10nm (110) ultra thin body SOI
- Huiling Shang
- J. Rubino
- et al.
- 2005
- VLSI Technology 2005
Conference paperCompact modeling of FinFETs featuring independent-gate operation mode
- C.-H. Lin
- X. Xi
- et al.
- 2005
- VLSI Technology 2005
Conference paperOn the scalability and carrier transport of advanced CMOS devices
- Meikei Ieong
- Leland Chang
- et al.
- 2005
- ICICDT 2005
Conference paperAggressively scaled (0.143 μm 2) 6T-SRAM cell for the 32 nm node and beyond
- D. Fried
- J. Hergenrother
- et al.
- 2004
- IEDM 2004
Conference paperCMOS circuit performance enhancement by surface orientation optimization
- Leland Chang
- Meikei Ieong
- et al.
- 2004
- IEEE Transactions on Electron Devices
Paper