HRL-Topo: Hierarchical Reinforcement Learning with Large Language Models for Analog Circuit Topology Synthesis
- Prashanth Vijayaraghavan
- Luyao Shi
- et al.
- 2026
- DAC 2026
Conference paper
Publications
8 results for Vandana Mukherjee
AUTOCIRCUIT-RL: Reinforcement Learning-Driven LLM for Automated Circuit Topology Generation
- Prashanth Vijayaraghavan
- Luyao Shi
- et al.
- 2025
- ICML 2025
Conference paperDiReC: Enhancing VHDL Code Generation and Summarization with Divide-Retrieve-Conquer Strategy
- Prashanth Vijayaraghavan
- Apoorva Nitsure
- et al.
- 2025
- DAC 2025
PosterEnhancing LLMs for HDL Code Optimization using Domain Knowledge Injection
- Che-ming Chang
- Prashanth Vijayaraghavan
- et al.
- 2025
- DAC 2025
PosterCIRCUITSYNTH-RL: LLM-Based Circuit Topology Synthesis with RL Refinement
- Prashanth Vijayaraghavan
- Luyao Shi
- et al.
- 2025
- DAC 2025
PosterSemantic Expansion of Clinician Generated Data Preferences for Automatic Patient Data Summarization
- Ashutosh Jadhav
- Tyler Baldwin
- et al.
- 2021
- AMIA Annual Symposium 2021
Conference paperSemi-supervised identification of SARS-CoV-2 molecular targets
- Kristen Beck
- Ed Seabolt
- et al.
- 2021
- bioRxiv
PaperAnalysis and Forecasting of Global RT-PCR Primers for SARS-CoV-2
- Gowri Nayar
- Ed Seabolt
- et al.
- 2021
- bioRxiv
Paper