Intrinsic dielectric stack reliability of a high performance bulk planar 20nm replacement gate high-k metal gate technology and comparison to 28nm gate first high-k metal gate process
- W. McMahon
- C. Tian
- et al.
- 2013
- IRPS 2013
Conference paper
Publications
182 results for Eduard Cartier
Origins of effective work function roll-off behavior for high-κ last replacement metal gate stacks
- Takashi Ando
- Eduard A. Cartier
- et al.
- 2013
- IEEE Electron Device Letters
PaperAggressive SiGe channel gate stack scaling by remote Oxygen scavenging: Gate-first pFET performance and reliability
- Martin M. Frank
- Eduard A. Cartier
- et al.
- 2012
- ECS Solid State Letters
PaperAggressive sige channel gate stack scaling by remote oxygen scavenging: Gate-first pFET performance and reliability
- Martin M. Frank
- Eduard A. Cartier
- et al.
- 2012
- ECS Meeting 2012
Conference paperBias temperature instability in high-κ/metal gate transistors - Gate stack scaling trends
- Siddarth Krishnan
- Vijay Narayanan
- et al.
- 2012
- IRPS 2012
Conference paperDetailed study of fast transient relaxation of Vt instability in HKMG nFETs
- K. Zhao
- James Stathis
- et al.
- 2012
- IRPS 2012
Conference paperHigh performance bulk planar 20nm CMOS technology for low power mobile applications
- Huiling Shang
- Sameer Jain
- et al.
- 2012
- VLSI Technology 2012
Conference paperVoltage ramp stress for hot-carrier screening of scaled CMOS devices
- A. Kerber
- W. McMahon
- et al.
- 2012
- IEEE Electron Device Letters
PaperA manufacturable dual channel (Si and SiGe) high-k metal gate CMOS technology with multiple oxides for high performance and low power applications
- S. Krishnan
- U. Kwon
- et al.
- 2011
- IEDM 2011
Conference paperImpact of TDDB in MG/HK devices on circuit functionality in advanced CMOS technologies
- Andreas Kerber
- D. Lipp
- et al.
- 2011
- IEDM 2011
Conference paper