Process Challenges in Fully Aligned Via Integration for sub 32 nm Pitch BEOL
- Benjamin D. Briggs
- C.B. Pcethala
- et al.
- 2018
- IITC 2018
Conference paper
Publications
77 results for Juntao Li
Impact of Liner Metals on Copper Resistivity at beyond 7nm Dimensions
- H. Huang
- Nicholas A. Lanzillo
- et al.
- 2018
- IITC 2018
Conference paperChannel Geometry Impact and Narrow Sheet Effect of Stacked Nanosheet
- Chun Wing Yeung
- Jingyun Zhang
- et al.
- 2018
- IEDM 2018
Conference paperStrain, stress, and mechanical relaxation in fin-patterned Si/SiGe multilayers for sub-7 nm nanosheet gate-all-around device technology
- S. Reboh
- R. Coquand
- et al.
- 2018
- Applied Physics Letters
PaperA comparative study of strain and Ge content in Si1-xGex channel using planar FETs, FinFETs, and strained relaxed buffer layer FinFETs
- Choonghyun Lee
- Shogo Mochizuki
- et al.
- 2017
- IEDM 2017
Conference paperFully aligned via integration for extendibility of interconnects to beyond the 7 nm node
- Benjamin D. Briggs
- C.B. Peethala
- et al.
- 2017
- IEDM 2017
Conference paperQuantification of local strain distributions in nanoscale strained SiGe FinFET structures
- Shogo Mochizuki
- Conal E. Murray
- et al.
- 2017
- Journal of Applied Physics
PaperStacked nanosheet gate-all-around transistor to enable scaling beyond FinFET
- N. Loubet
- T.B. Hook
- et al.
- 2017
- VLSI Technology 2017
Conference paperSiGe FinFET for practical logic libraries by mitigating local layout effect
- G. Tsutsui
- Huimei Zhou
- et al.
- 2017
- VLSI Technology 2017
Conference paperDual beam laser annealing for contact resistance reduction and its impact on VLSI integrated circuit variability
- Zuoguang Liu
- Oleg Gluschenkov
- et al.
- 2017
- VLSI Technology 2017
Conference paper