Design of a process variation tolerant self-repairing SRAM for yield enhancement in nanoscaled CMOS
- Saibal Mukhopadhyay
- Keejong Kim
- et al.
- 2007
- IEEE Journal of Solid-State Circuits
Paper
Publications
45 results for Kaushik Roy
Device-optimization technique for robust and low-power FinFET SRAM design in NanoScale era
- Aditya Bansal
- Saibal Mukhopadhyay
- et al.
- 2007
- IEEE Transactions on Electron Devices
PaperStatistical characterization and on-chip measurement methods for local random variability of a process using sense-amplifier-based test structure
- Saibal Mukhopadhyay
- Keunwoo Kim
- et al.
- 2007
- ISSCC 2007
Conference paperRobust level converter design for sub-threshold logic
- Ik Joon Chang
- Jae-Joon Kim
- et al.
- 2006
- ISLPED 2006
Conference paperModeling and analysis of leakage currents in double-gate technologies
- Saibal Mukhopadhyay
- Keunwoo Kim
- et al.
- 2006
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
PaperA leakage-tolerant low-swing circuit style in partially depleted silicon-on-insulator CMOS technologies
- Jae-Joon Kim
- Kaushik Roy
- 2006
- IEEE Transactions on VLSI Systems
PaperOptimal UTB FD/SOI device structure using thin BOX for sub-50-nm SRAM design
- Saibal Mukhopadhyay
- Keunwoo Kim
- et al.
- 2006
- IEEE Electron Device Letters
PaperModeling and analysis of gate leakage in ultra-thin oxide sub-50nm double gate devices and circuits
- Saibal Mukhopadhyay
- Keunwoo Kim
- et al.
- 2005
- ISQED 2005
Conference paperModeling and analysis of total leakage currents in nanoscale double gate devices and circuits
- Saibal Mukhopadhyay
- Keunwoo Kim
- et al.
- 2005
- ISLPED 2005
Conference paperCombined circuit and architectural level variable supply-voltage scaling for low power
- Hai Li
- Chen-Yong Cher
- et al.
- 2005
- IEEE Transactions on VLSI Systems
Paper