Improve variability in carbon nanotube FETs by scaling
- Yanning Sun
- George Tuleski
- et al.
- 2010
- DRC 2010
Conference paper
Publications
178 results for Wilfried Haensch
Effects of substrate orientation and channel stress on short-channel thin SOI MOSFETs
- Amlan Majumdar
- Christine Ouyang
- et al.
- 2010
- IEEE T-ED
PaperSharp reduction of contact resistivities by effective schottky barrier lowering with silicides as diffusion sources
- Zhen Zhang
- F. Pagette
- et al.
- 2010
- IEEE Electron Device Letters
PaperHigh-κ/metal-gate fully depleted SOI CMOS with single-silicide schottky source/drain with sub-30-nm gate length
- Marwan H. Khater
- Zhen Zhang
- et al.
- 2010
- IEEE Electron Device Letters
PaperPractical strategies for power-efficient computing technologies
- Leland Chang
- David J. Frank
- et al.
- 2010
- Proceedings of the IEEE
PaperAre Si/SiGe tunneling field-effect transistors a good idea?
- Steven J. Koester
- Isaac Lauer
- et al.
- 2010
- ECS Transactions
Conference paperExperimental and theoretical explanation for the orientation dependence gate-induced drain leakage in scaled MOSFETs
- P. Solomon
- S.E. Laux
- et al.
- 2009
- DRC 2009
Conference paperHydrogen silsesquioxane-based hybrid electron beam and optical lithography for high density circuit prototyping
- M. Guillorn
- J. Chang
- et al.
- 2009
- Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures
PaperFDSOI CMOS with dual backgate control for performance and power modulation
- Jeng-Bang Yau
- Jin Cai
- et al.
- 2009
- VLSI-TSA 2009
Conference paperTrigate 6T SRAM scaling to 0.06 μm2
- M. Guillorn
- J. Chang
- et al.
- 2009
- IEDM 2009
Conference paper