56 nm pitch copper dual-damascene interconnects with triple pitch split metal and double pitch split via
- James Hsueh-Chung Chen
- Christopher Waskiewicz
- et al.
- 2012
- IITC 2012
Conference paper
Publications
9 results for Erin McLellan
Sub-25nm FinFET with advanced fin formation and short channel effect engineering
- Tenko Yamashita
- Veeraraghvan S. Basker
- et al.
- 2011
- VLSI Technology 2011
Conference paper64 nm pitch Cu dual-damascene interconnects using pitch split double exposure patterning scheme
- Shyng-Tsong Chen
- Hideyuki Tomizawa
- et al.
- 2011
- IITC/MAM 2011
Conference paperQualification, monitoring, and integration into a production environment of the world's first fully programmable illuminator
- Gregory McIntyre
- Daniel Corliss
- et al.
- 2011
- SPIE Advanced Lithography 2011
Conference paperSystematic studies on reactive ion etch-induced deformations of organic underlayers
- Martin Glodde
- Sebastian Engelmann
- et al.
- 2011
- SPIE Advanced Lithography 2011
Conference paperA 0.063 μm2 FinFET SRAM cell demonstration with conventional lithography using a novel integration scheme with aggressively scaled fin and gate pitch
- Veeraraghvan S. Basker
- Theodorus E. Standaert
- et al.
- 2010
- VLSI Technology 2010
Conference paperSpacer defined double patterning for sub-72 nm pitch logic technology
- Ryoung-Han Kim
- Erin McLellan
- et al.
- 2010
- SPIE Advanced Lithography 2010
Conference paperOvercoming the challenges of 22-nm node patterning through litho-design co-optimization
- Martin Burkharde
- J.C. Arnold
- et al.
- 2009
- SPIE Advanced Lithography 2009
Conference paper22 nm technology compatible fully functional 0.1 μm 2 6T-sram cell
- B. Haran
- A. Kumar
- et al.
- 2008
- IEDM 2008
Conference paper