Backside Routing Enablement Considerations For Advanced Node GAA Devices
- Kumar Subramani
- Rwik Sengupta
- et al.
- 2025
- VLSI Technology and Circuits 2025
Invited talk
Publications
42 results at VLSI Technology and Circuits
Chiplet and Heterogeneous integration Technologies for HPC and AI
- 2025
- VLSI Technology and Circuits 2025
Workshop paperHeterogeneous neural processing units leveraging analog in-memory computing for edge AI
- 2025
- VLSI Technology and Circuits 2025
Workshop paperTile Efficiency is not System Efficiency – CIM architecture studies of LLMs and other large DNNs
- Pritish Narayanan
- 2025
- VLSI Technology and Circuits 2025
Workshop paperArchitectural Benchmarking of Compute-in-Memory Systems
- Pritish Narayanan
- Sidney Tsai
- 2025
- VLSI Technology and Circuits 2025
WorkshopHardware Accelerator Design for AI: Enabling Generative Models
- Leland Chang
- 2025
- VLSI Technology and Circuits 2025
Short courseFirst demonstration of high retention energy barriers and 2 ns switching, using magnetic ordered-alloy-based STT MRAM devices
- Matthias Gottwald
- Guohan Hu
- et al.
- 2024
- VLSI Technology and Circuits 2024
Conference paperBackside power distribution for nanosheet technologies beyond 2nm
- Ruilong Xie
- Wonhyuk Hong
- et al.
- 2024
- VLSI Technology and Circuits 2024
Conference paperState-Independent Low Resistance Drift SiSbTe Phase Change Memory for Analog In-Memory Computing Applications
- Michelle Cheng
- Zhi-Lun Liu
- et al.
- 2024
- VLSI Technology and Circuits 2024
Conference paperA 0.88pJ/bit 112Gb/s PAM4 Transmitter with 1Vppd Output Swing and 5-Tap Analog FFE in 7nm FinFET CMOS
- Zeynep Toprak-Deniz
- Timothy O. Dickson
- et al.
- 2024
- VLSI Technology and Circuits 2024
Conference paper