Model for a 15 ns 16K RAM with Josephson Junctions
- William Kotyczka
- Pierre Gueret
- et al.
- 1979
- IEEE JSSC
Paper
Publications
121 results at IEEE JSSC
1 µm MOSFET VLSI Technology: Part VIII-Radiation Effects
- John M. Aitken
- 1979
- IEEE JSSC
PaperBipolar Transistor Design for Optimized Power-Delay Logic Circuits
- D.D. Tang
- Paul M. Solomon
- 1979
- IEEE JSSC
Paper1 µm MOSFET VLSI Technology: Part II-Device Designs and Characteristics for High-Performance Logic Applications
- Robert H. Dennard
- Fritz H. Gaensslen
- et al.
- 1979
- IEEE JSSC
PaperA Figure of Merit for IC Packaging
- Robert W. Keyes
- 1978
- IEEE JSSC
PaperA 1 mV MOS Comparator
- Yen S. Yee
- Lewis M. Terman
- et al.
- 1978
- IEEE JSSC
PaperA Multiple-Gate CCD-Photodiode Sensor Element for Imaging Arrays
- James M. White
- Savvas G. Chamberlain
- 1978
- IEEE JSSC
PaperA Josephson Latch
- Arthur Davidson
- 1978
- IEEE JSSC
PaperMultiple Word/Bit Line Redundancy for Semiconductor Memories
- Stanley E. Schuster
- 1978
- IEEE JSSC
PaperAn Experimental 64-Bit Decoded Josephson NDRO Random Access Memory
- Walter H. Henkels
- Hans H. Zappe
- 1978
- IEEE JSSC
Paper