Publications

3 results at VLSI Circuits 2002

SOI-optimized 64-bit high-speed CMOS adder design
- - Jae-Joon Kim
  - Rajiv Joshi
  - et al.
- 2002
- VLSI Circuits 2002
Conference paper
A 40 GHz VCO with 9 to 15% tuning range in 0.13μm SOI CMOS
- - Neric Fong
  - Jean-Olivier Plouchart
  - et al.
- 2002
- VLSI Circuits 2002
Conference paper
High performance SRAMs in 1.5 V, 0.18μm partially depleted SOI technology
- - R.V. Joshi
  - A. Pellela
  - et al.
- 2002
- VLSI Circuits 2002
Conference paper