Swagath Venkataramani

Publications

• Reducing Address Arithmetic Overheads: New Compiler Techniques for Programmable Dataflow-based AI Accelerators

  • • Prasanth Chatarasi
    • Nicole Khoun
    • et al.
  • 2026
  • PACT 2026

  Conference paper

• Is Finer Better? The Limits of Microscaling Formats in Large Language Models

  • • Andrea Fasoli
    • Monodeep Kar
    • et al.
  • 2026
  • ICLR 2026

  Conference paper

• Eliminating Redundancy: Ultra-compact Code Generation for Programmable Dataflow Accelerators

  • • Prasanth Chatarasi
    • Alex Gatea
    • et al.
  • 2026
  • CGO 2026

  Conference paper

• Spyre: An inference-optimized scalable AI accelerator for enterprise workloads

  • • Matt Cohen
    • Monodeep Kar
    • et al.
  • 2026
  • ISSCC 2026

  Conference paper

• Enabling Spill-Free Compilation via Affine-Based Live Range Reduction Optimization

  • • Prasanth Chatarasi
    • Alex Gatea
    • et al.
  • 2026
  • CGO 2026

  Conference paper

• DeepTools: A Full-Stack Machine Learning Compiler for the IBM Spyre Accelerator

  • • Prasanth Chatarasi
    • Shubham Jain
    • et al.
  • 2026
  • CGO 2026

  Workshop paper

• Breaking the HBM Bit Cost Barrier: Domain-Specific ECC for AI Inference Infrastructure

  • • Rui Xie
    • Asad Ul Haq
    • et al.
  • 2025
  • IEEE Computer Architecture Letters

  Paper

• MixTrain: accelerating DNN training via input mixing

  • • Sarada Krithivasan
    • Sanchari Sen
    • et al.
  • 2024
  • Frontiers in Artificial Intelligence

  Paper

• A Software-Assisted Peak Current Regulation Scheme to Improve Power-Limited Inference Performance in a 5nm AI SoC

  • • Monodeep Kar
    • Joel Silberman
    • et al.
  • 2024
  • ISSCC 2024

  Conference paper

• DNNDaSher: A Compiler Framework for Dataflow Compatible End-to-End Acceleration on IBM AIU

  • • Sanchari Sen
    • Shubham Jain
    • et al.
  • 2024
  • IEEE Micro

  Paper