Conference paper
A test structure for characterizing local device mismatches
Kanak Agarwal, Frank Liu, et al.
VLSI Circuits 2006
A 0.9 V to 1.9 V dynamic voltage-scalable and frequency-scalable 32b powerPC processor is presented. Its dynamic frequency scaling operates from 366 MHz at 1.8 V and 600 mW down to 150 MHz at 1.0 V and 53 mW in a 0.18 μm CMOS process. The processor maximum supply change observed without PLL relock is 10 mV/μs. Processor state save/restore enables a deep-sleep state.
Kanak Agarwal, Frank Liu, et al.
VLSI Circuits 2006
Juan Antonio Carballo, Kevin Nowka, et al.
DAC 2004
Kanak Agarwal, Harmander Deogun, et al.
ISQED 2006
Ohsang Kwon, Kevin Nowka, et al.
Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology