Single-cycle, pulse-shaped critical path monitor in the POWER7+ microprocessor
- Alan J. Drake
- Michael S. Floyd
- et al.
- 2013
- ISLPED 2013
Conference paper
Publications
13 results for Gary D. Carpenter
Current saturation in submicrometer graphene transistors with thin gate dielectric: Experiment, simulation, and theory
- Shu-Jen Han
- Dharmendar Reddy
- et al.
- 2012
- ACS Nano
PaperAn on-chip dual supply charge pump system for 45nm PD SOI eDRAM
- J.B. Kuang
- A. Mathews
- et al.
- 2008
- ESSCIRC 2008
Conference paperDynamic measurement of critical-path timing
- Alan J. Drake
- Robert M. Senger
- et al.
- 2008
- ICICDT 2008
Conference paperA scheme for on-chip timing characterization
- Ramyanshu Datta
- Gary Carpenter
- et al.
- 2006
- VTS 2006
Conference paperDynamically optimized synchronous communication for low power system on chip designs
- Vikas Chandra
- Gary Carpenter
- et al.
- 2003
- ICCD 2003
Conference paperThe design and application of the PowerPC 405LP energy-efficient system-on-a-chip
- Kevin J. Nowka
- Gary D. Carpenter
- et al.
- 2003
- IBM J. Res. Dev
PaperA 32-bit powerPC system-on-a-chip with support for dynamic voltage scaling and dynamic frequency scaling
- Kevin J. Nowka
- Gary D. Carpenter
- et al.
- 2002
- IEEE Journal of Solid-State Circuits
PaperA 0.9 V to 1.95 V dynamic voltage-scalable and frequency-scalable 32 b powerPC processor
- Kevin Nowka
- Gary Carpenter
- et al.
- 2002
- ISSCC 2002
Conference paperA 0.9 V to 1.95 V dynamic voltage-scalable and frequency-scalable 32 b PowerPC processor
- Kevin Nowka
- Gary Carpenter
- et al.
- 2002
- ISSCC 2002
Conference paper