Manu Shamsa, Paul M. Solomon, et al.
IEEE Transactions on Electron Devices
A bulk silicon divide-by-two dynamic frequency divider with maximum clock speed of 26.5 GHz has been achieved. The dynamic divider operates from 6.5 GHz to 26.5 GHz. The design is based on n-channel MOSFET's with an effective gate length of 0.1 µm. © 2000, The Institute of Electrical and Electronics Engineers, Inc. All rights reserved.
Manu Shamsa, Paul M. Solomon, et al.
IEEE Transactions on Electron Devices
C. Zhou, Keith A. Jenkins, et al.
IRPS 2018
Franco Stellari, Alan J. Weger, et al.
IRPS 2018
Keith A. Jenkins, Karthik Balakrishnan, et al.
IEEE Electron Device Letters