Tony Tae-Hyoung Kim, Pong-Fei Lu, et al.
IEEE Transactions on VLSI Systems
Paper
A 26.5 GHz Silicon MOSFET 2:1 Dynamic Frequency Divider
Abstract
A bulk silicon divide-by-two dynamic frequency divider with maximum clock speed of 26.5 GHz has been achieved. The dynamic divider operates from 6.5 GHz to 26.5 GHz. The design is based on n-channel MOSFET's with an effective gate length of 0.1 µm. © 2000, The Institute of Electrical and Electronics Engineers, Inc. All rights reserved.
Related
Stas Polonsky, Keith A. Jenkins
ISDRS 2003
Conference paper
On-chip real-time power supply noise detector
Anuja Sehgal, Peilin Song, et al.
ESSCIRC 2006
Steven J. Koester, Albert M. Young, et al.
IBM J. Res. Dev