Modeling polarization for Hyper-NA lithography tools and masks
Kafai Lai, Alan E. Rosenbluth, et al.
SPIE Advanced Lithography 2007
We have exploited a recently-developed, through-wafer via technology in silicon to implement a novel Faraday cage scheme for substrate crosstalk suppression in system-on-chip (SOC) applications. The Faraday cage structure consists of a ring of grounded vias encircling sensitive or noisy portions of a chip. The via technology features high aspect ratio, through-wafer holes filled with electroplated Cu and lined with a silicon nitride barrier layer. The new Faraday cage structure has shown crosstalk suppression of 40 dB at 1 GHz and 36 dB at 5 GHz at a distance of 100 μm. This is about 10 dB better than any other isolation technique previously reported. © 2001 IEEE.
Kafai Lai, Alan E. Rosenbluth, et al.
SPIE Advanced Lithography 2007
R.D. Murphy, R.O. Watts
Journal of Low Temperature Physics
K.A. Chao
Physical Review B
U. Wieser, U. Kunze, et al.
Physica E: Low-Dimensional Systems and Nanostructures